Patent for Sale:

Double Insulating Silicon on Diamond Device    

A new device architecture to improve short channel effects and leakage current

Overview

This is a silicon on diamond (SOD) MOSFET structure that enhances off-state leakage current and provides improved short channel effects.

The new structure eliminates the degraded drain induced barrier lowering (DIBL) inherently observed in SOD devices. A second insulating layer over the buried diamond layer is integrated which partially covers the diamond layer. An expression for the total body capacitance through the insulating layers is obtained. Using analytical model, the second insulating layer dimensions are computed. In order to evaluate the impact of second insulating layer on the device characteristics, hydrodynamic numeric analysis is performed. Device simulation results verified the analytical model in DIBL improvement. Maximum lattice temperature of the new structure is well below SOI device and 5% higher in comparison with SOD substrate. The device simulation results demonstrate short channel effects improvement and suppressed self-heating effects.

Primary Application of the Technology

Chip makers; smart mobile phone market; IC suppliers

Competitive Advantage

It improves short channel effects (SCE) in silicon on diamond MOS transistors. It reduces leakage current and enhances off current (Ioff). The concept of the technology and physical reasons behind SCE improvement has been published in the journal of diamond.

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