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Private Listing: Number 4785 Private  

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Patent Summary

U.S. Patent Classes & Classifications Covered in this listing:

Class 365: Static Information Storage And Retrieval

Apparatus or corresponding processes for the static storage and retrieval of information. For classification herein, the storage system must be (1) static, (2) a singular storage element or plural elements of the same type, (3) addressable.

Subclass 36: Ion implantation
Subclass 185.11: Bank or block architecture
Subclass 185.13: Global word or bit lines
Subclass 185.17: Logic connection (e.g., NAND string)
Subclass 185.23: Drive circuitry (e.g., word line driver)
Subclass 185.25: Line charging (e.g., precharge, discharge, refresh)
Subclass 51: FORMAT OR DISPOSITION OF ELEMENTS
Subclass 63: INTERCONNECTION ARRANGEMENTS
Subclass 104: Transistors
Subclass 178: Ion implantation
Subclass 181: Complementary conductivity
Subclass 182: Insulated gate devices
Subclass 189.09: Including reference or bias voltage generator
Subclass 191: Signals
Subclass 194: Delay
Subclass 200: Bad bit
Subclass 203: Precharge
Subclass 204: Accelerating charge or discharge
Subclass 205: Flip-flop used for sensing
Subclass 207: Differential sensing
Subclass 230.01: ADDRESSING
Subclass 230.02: Multiplexing
Subclass 230.03: Plural blocks or banks
Subclass 230.04: Alternate addressing (e.g., even/odd)
Subclass 230.06: Particular decoder or driver circuit
Subclass 230.08: Including particular address buffer or latch circuit arrangement
Subclass 233.5: Transition detection
Subclass 238.5: Byte or page addressing
Subclass 240: Using shift register

Class 711: Electrical Computers And Digital Processing Systems: Memory

This class provides, within an electrical computer or digital data processing system, for the following processes and apparatus 1. for addressing memory wherein the processes and apparatus involve significant address manipulating (e.g., combining, translating, or mapping and other techniques for formatting and modifying address data) and are combined with specific memory configurations or memory systems; 2. for accessing and controlling memory (e.g., transferring and modifying address data, selecting storage devices, scheduling access); and 3. for forming memory addresses (e.g., virtual memory addressing, address translating, translation-lookaside buffers (TLBs), boundary checking, and page mode).

Subclass 202: Address mapping (e.g., conversion, translation)

Class 257: Active Solid-State Devices (E.G., Transistors, Solid-State Diodes)

This class provides for active solid-state electronic devices, that is, electronic devices or components that are made up primarily of solid materials, usually semiconductors, which operate by the movement of charge carriers - electrons or holes - which undergo energy level changes within the material and can modify an input voltage to achieve rectification, amplification, or switching action, and are not classified elsewhere.

Subclass 315: With floating gate electrode
Subclass 316: With additional contacted control electrode
Subclass 327: Short channel insulated gate field effect transistor
Subclass 330: Gate electrode in groove
Subclass 335: Active channel region has a graded dopant concentration decreasing with distance from source region (e.g., double diffused device, DMOS transistor)
Subclass 336: With lightly doped portion of drain region adjacent channel (e.g., LDD structure)
Subclass 337: In integrated circuit structure
Subclass 338: With complementary field effect transistor
Subclass 339: With means to increase breakdown voltage
Subclass 345: With means to prevent sub-surface currents, or with non-uniform channel doping
Subclass 347: Single crystal semiconductor layer on insulating substrate (SOI)
Subclass 351: Complementary field effect transistor structures only (i.e., not including bipolar transistors, resistors, or other components)
Subclass 355: With overvoltage protective means
Subclass 361: For operation as bipolar or punchthrough element
Subclass 362: Punchthrough or bipolar element
Subclass 366: Overlapping gate electrodes
Subclass 368: Insulated gate field effect transistor in integrated circuit
Subclass 369: Complementary insulated gate field effect transistors
Subclass 372: With means to prevent latchup or parasitic conduction channels
Subclass 373: With pn junction to collect injected minority carriers to prevent parasitic bipolar transistor action
Subclass 375: With means to reduce substrate spreading resistance (e.g., heavily doped substrate)
Subclass 390: Matrix or array of field effect transistors (e.g., array of FETs only some of which are completed, or structure for mask programmed read-only memory (ROM))
Subclass 399: Combined with heavily doped channel stop portion
Subclass 408: Including lightly doped drain portion adjacent channel (e.g., lightly doped drain, LDD device)
Subclass 413: Polysilicon laminated with silicide
Subclass 499: INTEGRATED CIRCUIT STRUCTURE WITH ELECTRICALLY ISOLATED COMPONENTS
Subclass 500: Including high voltage or high power devices isolated from low voltage or low power devices in the same integrated circuit
Subclass 503: With contact or metallization configuration to reduce parasitic coupling (e.g., separate ground pads for different parts of integrated circuit)
Subclass 508: With metallic conductor within isolating dielectric or between semiconductor and isolating dielectric (e.g., metal shield layer or internal connection layer)
Subclass 532: Including capacitor component
Subclass 546: With structural means to protect against excess or reversed polarity voltage
Subclass 622: Groove
Subclass 664: TRANSMISSION LINE LEAD (E.G., STRIPLINE, COAX, ETC.)
Subclass 692: With particular lead geometry
Subclass 773: Of specified configuration
Subclass E27.081: Including field-effect component (EPO)
Subclass E27.099: Load element being a MOSFET transistor (EPO)
Subclass E27.102: Read-only memory, ROM, structure (EPO)
Subclass E27.112: Including insulator on semiconductor, e.g. SOI (silicon on insulator) (EPO)
Subclass E29.129: Gate electrodes for transistors with floating gate (EPO)
Subclass E29.146: On silicon (EPO)
Subclass E29.268: Source region and drain region having nonsymmetrical structure about gate electrode (EPO)
Subclass E29.275: With multiple gates (EPO)
Subclass E23.144: Capacitive arrangements or effects of, or between wiring layers (EPO)
Subclass E21.427: With asymmetry in channel direction, e.g., high-voltage lateral transistor with channel containing layer, e.g., p-base (EPO)
Subclass E21.582: Characterized by formation and post treatment of conductors, e.g., patterning (EPO)
Subclass E21.661: Static random access memory structures (SRAM) (EPO)
Subclass E21.672: Entire channel doping programmed (EPO)
Subclass E21.676: With source and drain on different levels, e.g., vertical channel (EPO)
Subclass E21.678: Simultaneous fabrication of periphery and memory cells (EPO)
Subclass E21.703: Substrate is semiconductor body (EPO)

Class 361: Electricity: Electrical Systems And Devices

Systems or devices which provide safety and protection for other systems and devices; control circuits for electromagnetic devices and non-electromagnetic-type relays. Systems or devices which discharge, or prevent the accumulation of electrical charge on or in an object or material; circuits for charging objects or materials. Systems for generating or conducting an electric charge. Systems which process electrical speed signals. Circuits for reversing the polarity of an electric circuit. Systems which cause the ignition of a fuel or an explosive charge. Systems and processes for demagnetizing a magnetic field. Transformers and inductors with integral switch, capacitor or lock. Electrostatic capacitors, per se. Housings and mounting assemblies with plural diverse electrical components. Electrolytic systems and devices.

Subclass 111: Transient responsive

Class 327: Miscellaneous Active Electrical Nonlinear Devices, Circuits, And Systems

This is the residual class for electrical devices, circuits or systems having an output not directly proportional to its input and comprising at least one component which can provide gain or can route electrical current and which device, circuit or system does not form a complete system such as is classified specifically elsewhere or a subcombination of utility only in such elsewhere classified system.

Subclass 108: Current driver
Subclass 262: Including significant compensation (e.g., temperature compensated delay, etc.)
Subclass 276: Single output with variable or selectable delay
Subclass 277: Including delay line or charge transfer device
Subclass 278: Having specific active circuit element or structure (e.g., complementary transistors, etc.)
Subclass 281: Field-effect transistor
Subclass 362: With compensation

Class 438: Semiconductor Device Manufacturing: Process

This class provides for manufacturing a semiconductor containing a solid-state device for the following purposes: (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy. Also operations involving: (1) coating a substrate with a semiconductive material, or (2) coating a semiconductive substrate or substrate containing a semiconductive region. It also provides for operations involving etching a semiconductive substrate or etching a substrate containing a semiconductive region. The class provides for packaging or treatment of packaged semiconductor.

Subclass 233: And contact formation
Subclass 241: And additional field effect transistor (e.g., sense or access transistor, etc.)
Subclass 264: Tunneling insulator
Subclass 275: Making plural insulated gate field effect transistors of differing electrical characteristics
Subclass 276: Introducing a dopant into the channel region of selected transistors
Subclass 278: After formation of source or drain regions and gate electrode (e.g., late programming, encoding, etc.)
Subclass 286: Asymmetric
Subclass 291: Using channel conductivity dopant of opposite type as that of source and drain
Subclass 420: Plural doping steps
Subclass 530: Including heat treatment
Subclass 587: Forming array of gate electrodes
Subclass 622: Multiple metal levels, separated by insulating layer (i.e., multiple level metallization)
Subclass 626: Planarization
Subclass 627: At least one layer forms a diffusion barrier
Subclass 629: Diverse conductive layers limited to viahole/plug
Subclass 637: With formation of opening (i.e., viahole) in insulative layer
Subclass 638: Having viaholes of diverse width
Subclass 687: Copper of copper alloy conductor

Class 148: Metal Treatment

Treating metal to modify or maintain the internal physical structure or chemical properties of metal. Most processes in this class relate to treating solid or semisolid metal with heat, without melting a substantial portion thereof, and also includes the combination of significant heating and working not provided for in other metal working classes. Cooling of metal to produce microstructure change is proper for this class. It includes processes of treating metal to intentionally develop, improve, modify, or preserve the magnetic properties of a free metal or alloy, occurring alone or mixed with one or more components. Also included are processes of reactive coating of metal wherein an externally supplied carburizing or nitriding agent is combined with the metal substrate to produce a carburized or nitridized or carbonitrided coating thereon or a uniformly carburized, nitrided, or carbonitrided metal alloy containing a metal element from said substrate.


Class 714: Error Detection/Correction And Fault Detection/Recovery

This class provides for process or apparatus for detecting and correcting errors in electrical pulse or pulse coded data; it also provides for process or apparatus for detecting and recovering from faults in electrical computers and digital data processing systems, as well as logic level based systems.

Subclass 718: Memory testing

Class 326: Electronic Digital Logic Circuitry

This is the generic class for electronic digital logic devices, circuitry and subcombinations thereof, wherein non-arithmetical operations are performed upon discrete electrical signals representing a value normally described by numerical digits.

Subclass 87: Having plural output pull-up or pull-down transistors
Subclass 93: CLOCKING OR SYNCHRONIZING OF LOGIC STAGES OR GATES

Class 430: Radiation Imagery Chemistry: Process, Composition, Or Product Thereof

This is the generic class for: (1) Forming the likeness of an object, or an instrumented or discernible phenomenon, in a chemically defined receiver or in a receiver wherein radiation produces a chemical reaction, by use of radiation. (2) Finishing an image by chemical processing regardless how formed. (3) A radiation sensitive receiver, composition, or product disclosed solely for radiation imagery chemistry, and process of making same. (4) A nonradiation sensitive-receiver, composition, or product. (5) An imaged product by a process or employing a receiver, composition, or product.

Subclass 5: Radiation mask

Class 345: Computer Graphics Processing And Selective Visual Display Systems

Processes and apparatus for selective electrical control of two or more light-generating or light-controlling display elements* in accordance with a received or stored image data signal. The image data includes character, graphical information or display attribute data. The image data may include, for example, information data from a peripheral input device, from the reception of a television signal, from the recognition of image data, or from the generation or creation of image data by a computer.

Subclass 467: Character generating
Subclass 581: Attributes (surface detail or characteristic, display attributes)
Subclass 619: Graphic manipulation (object processing or display attributes)
Subclass 670: Reduction only
Subclass 671: Enlargement only