Tynax ~ Patent Library

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Patent Summary

U.S. Patent Classes & Classifications Covered in this listing:

Class 257: Active Solid-State Devices (E.G., Transistors, Solid-State Diodes)

This class provides for active solid-state electronic devices, that is, electronic devices or components that are made up primarily of solid materials, usually semiconductors, which operate by the movement of charge carriers - electrons or holes - which undergo energy level changes within the material and can modify an input voltage to achieve rectification, amplification, or switching action, and are not classified elsewhere.

Subclass 59: In array having structure for use as imager or display, or with transparent electrode
Subclass 65: Non-single crystal, or recrystallized, material containing non-dopant additive, or alloy of semiconductor materials (e.g., Ge x Si 1- x, polycrystalline silicon with dangling bond modifier)
Subclass 66: Field effect device in non-single crystal, or recrystallized, Semiconductor material
Subclass 72: In array having structure for use as imager or display, or with transparent electrode
Subclass 225: Non-electrical input responsive (e.g., light responsive imager, input programmed by size of storage sites for use as a read-only memory, etc.)
Subclass 411: Composite or layered gate insulator (e.g., mixture such as silicon oxynitride)
Subclass 443: Matrix or array (e.g., single line arrays)
Subclass 459: With particular contact geometry (e.g., ring or grid, or bonding pad arrangement)
Subclass E27.111: Substrate comprising other than a semiconductor material, e.g. insulating substrate or layered substrate Including a non-semiconductor layer (EPO)
Subclass E29.137: Characterized by configuration of gate stack of thin film FETs (EPO)
Subclass E29.147: For thin-film silicon (EPO)
Subclass E29.276: With supplementary region or layer in thin film or in insulated bulk substrate supporting it for controlling or increasing voltage resistance of device (EPO)
Subclass E29.278: With LDD structure or extension or offset region or characterized by doping profile (EPO)
Subclass E29.282: With light shield (EPO)
Subclass E29.291: With inverted transistor structure (EPO)
Subclass E29.293: With top gate (EPO)
Subclass E21.034: For lift-off process (EPO)
Subclass E21.035: Characterized by their composition, e.g., multilayer masks, materials (EPO)
Subclass E21.038: Characterized by process involved to create mask, e.g., lift-off mask, sidewalls, or to modify mask, such as pre-treatment, post-treatment (EPO)
Subclass E21.314: Using mask (EPO)
Subclass E21.346: Using mask (EPO)
Subclass E21.413: Lateral single gate single channel transistor with noninverted structure, i.e., channel layer is formed before gate (EPO)
Subclass E21.414: Lateral single gate single channel transistor with inverted structure, i.e., channel layer is formed after gate (EPO)
Subclass E21.415: Monocrystalline silicon transistor on insulating substrate, e.g., quartz substrate (EPO)

Class 349: Liquid Crystal Cells, Elements And Systems

Cells, elements, and systems which include molecules of a material having both liquid and crystalline properties. Included in this class are those which have a significant liquid crystal cell detail or liquid crystal response or properties, and in which the liquid crystal controls or changes the optical properties of electromagnetic radiation such as direction, phase, amplitude, frequency, or polarization state. This class also provides for nominal manufacturing methods for producing significant liquid crystal cell structure.

Subclass 110: Opaque mask or black mask
Subclass 111: Conductive mask
Subclass 117: Compensator or retarder (i.e., not using liquid crystal cell)
Subclass 127: Formed of a liquid crystal material
Subclass 128: With different alignments on opposite substrates
Subclass 129: With plural alignments on the same substrate
Subclass 136: With particular pretilt angle (i.e., with liquid crystal other than chiral smectic)
Subclass 155: Spacer
Subclass 156: Formed as walls (e.g., between pixels) or integral with substrate
Subclass 42: Transistor
Subclass 43: Structure of transistor
Subclass 46: With particular gate electrode structure
Subclass 47: With gate electrode between liquid crystal and semiconductor layer
Subclass 54: Matrix including additional element (s) which correct or compensate for electrical fault

Class 438: Semiconductor Device Manufacturing: Process

This class provides for manufacturing a semiconductor containing a solid-state device for the following purposes: (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy. Also operations involving: (1) coating a substrate with a semiconductive material, or (2) coating a semiconductive substrate or substrate containing a semiconductive region. It also provides for operations involving etching a semiconductive substrate or etching a substrate containing a semiconductive region. The class provides for packaging or treatment of packaged semiconductor.

Subclass 158: Inverted transistor structure
Subclass 159: Source-to-gate or drain-to-gate overlap
Subclass 163: Adjusting channel dimension (e.g., providing lightly doped source or drain region, etc.)
Subclass 164: Semiconductor islands formed upon insulating substrate or layer (e.g., mesa formation, etc.)
Subclass 30: Liquid crystal component
Subclass 304: Conductive sidewall component
Subclass 305: Plural doping steps
Subclass 488: Polycrystalline semiconductor

Class 445: Electric Lamp Or Space Discharge Component Or Device Manufacturing

This is the residual and generic class of process and apparatus for the manufacturing, fabrication, repair, salvage, assembly, disassembly or other treatment of an electric lamp, liquid crystal display device or an electric space discharge device which process or apparatus is not elsewhere classified.

Subclass 2: Repairing, converting or salvaging
Subclass 24: Display or gas panel making
Subclass 25: With sealing