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Patent for Sale:

Portable Inexpensive Rugged Memory Device    

Multiplexing and modulating techniques


The technology relates to electrically-coupled mechanical band-pass filters for use in multiplexed address systems in memory arrays, disposing of multiple memory arrays on a single substrate while maintaining a coplanar design with no cross-over lines, defect management, and logical arrangements of memory arrays.

Exemplary patent relates to the use of multiplexing and modulating techniques to reduce the number of interconnections required between a memory array and an interface circuit.

Patent Lot Citations: forward referenced by the following companies: Contour Semiconductor, Georgia Tech Research Corporation, IBM, and SanDisk 3D LLC.

Primary Application of the Technology


Patent Summary

U.S. Patent Classes & Classifications Covered in this listing:

Class 235: Registers

Machines employed for ascertaining the number of movements of various devices or machines; also, indicating devices where the purpose is to disclose the numerical extent or quantity of movement of a machine and where the device is separate and independent of the machine whose movements are to be noted; also organized machines, such as, cash-registers, fare-registers, voting machines and calculators having registering or counting devices as essential or important elements and having in addition certain other features necessary to make up the complete machines for the purposes desired.

Subclass 441: Electrical contact
Subclass 492: Conductive

Class 365: Static Information Storage And Retrieval

Apparatus or corresponding processes for the static storage and retrieval of information. For classification herein, the storage system must be (1) static, (2) a singular storage element or plural elements of the same type, (3) addressable.

Subclass 66: Magnetic
Subclass 69: Crossover
Subclass 105: Diodes
Subclass 130: Three-dimensional magnetic array
Subclass 163: Amorphous (electrical)
Subclass 175: Diodes
Subclass 189.08: Including specified plural element logic arrangement
Subclass 200: Bad bit
Subclass 201: Testing
Subclass 230.03: Plural blocks or banks
Subclass 230.06: Particular decoder or driver circuit
Subclass 231: Using selective matrix

Class 333: Wave Transmission Lines And Networks

Electric wave transmission systems wherein electromagnetic wave energy is guided or constrained by a wave transmission device of the long line type other than loaded lines. Included are passive wave transmission networks simulating the characteristics of a long line wave transmission systems or wave guides, such as artificial lines, delay networks, resonators, impedance matching networks, equalizers, wave filters and transmission line terminations. Passive coupling networks and terminating networks having either lumped or distributed electrical circuit parameters and having impedance characteristics. Smoothing type wave filters having shunt capacitance, or series inductance. Networks including a wave transmission device and means for decreasing the amplitude range of the signal applied to the transmission device as the signal increases in amplitude and means for increasing or restoring the amplitude range of the signal after the transmission over the transmission device. Passive networks for producing an output wave which is the time derivative or time integral of the input wave. Systems including active elements for producing across at least two of the system terminals a negative resistance, and/or an inductance, or capacitance which may be positive or negative. Wave traps using long line elements.

Subclass 186: Electromechanical filter

Class 711: Electrical Computers And Digital Processing Systems: Memory

This class provides, within an electrical computer or digital data processing system, for the following processes and apparatus 1. for addressing memory wherein the processes and apparatus involve significant address manipulating (e.g., combining, translating, or mapping and other techniques for formatting and modifying address data) and are combined with specific memory configurations or memory systems; 2. for accessing and controlling memory (e.g., transferring and modifying address data, selecting storage devices, scheduling access); and 3. for forming memory addresses (e.g., virtual memory addressing, address translating, translation-lookaside buffers (TLBs), boundary checking, and page mode).

Subclass 102: Solid-state read only memory (ROM)
Subclass 103: Programmable read only memory (PROM, EEPROM, etc.)
Subclass 154: Control technique
Subclass 165: Internal relocation

Class 714: Error Detection/Correction And Fault Detection/Recovery

This class provides for process or apparatus for detecting and correcting errors in electrical pulse or pulse coded data; it also provides for process or apparatus for detecting and recovering from faults in electrical computers and digital data processing systems, as well as logic level based systems.