Tynax ~ Patent Library

Patent Portfolio for Sale:

Memory Manufacturing Patents for Sale    

Seven U.S. patents available for sale


This family of patents covers methods and apparatus in areas such as sense amplifying, memory structure, control equipment, memory bus architecture, SDRAMS, testing, value determination.

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Patent Summary

U.S. Patent Classes & Classifications Covered in this Patent Portfolio:

Class 365: Static Information Storage And Retrieval

Apparatus or corresponding processes for the static storage and retrieval of information. For classification herein, the storage system must be (1) static, (2) a singular storage element or plural elements of the same type, (3) addressable.

Subclass 189.02: Multiplexing
Subclass 201: Testing
Subclass 221: Serial read/write
Subclass 222: Data refresh
Subclass 230.02: Multiplexing
Subclass 230.03: Plural blocks or banks

Class 714: Error Detection/Correction And Fault Detection/Recovery

This class provides for process or apparatus for detecting and correcting errors in electrical pulse or pulse coded data; it also provides for process or apparatus for detecting and recovering from faults in electrical computers and digital data processing systems, as well as logic level based systems.

Subclass 718: Memory testing
Subclass 733: Built-in testing circuit (BILBO)
Subclass 736: Device response compared to expected fault-free response
Subclass 753: Double error correcting with single error correcting code
Subclass 784: Reed-Solomon code
Subclass 764: Error correct and restore
Subclass 754: Error correction during refresh cycle

Class 438: Semiconductor Device Manufacturing: Process

This class provides for manufacturing a semiconductor containing a solid-state device for the following purposes: (a) conducting or modifying an electrical current, (b) storing electrical energy for subsequent discharge within a microelectronic integrated circuit, or (c) converting electromagnetic wave energy to electrical energy or electrical energy to electromagnetic energy. Also operations involving: (1) coating a substrate with a semiconductive material, or (2) coating a semiconductive substrate or substrate containing a semiconductive region. It also provides for operations involving etching a semiconductive substrate or etching a substrate containing a semiconductive region. The class provides for packaging or treatment of packaged semiconductor.

Subclass 231: Plural doping steps
Subclass 233: And contact formation
Subclass 257: Having additional gate electrode surrounded by dielectric (i.e., floating gate)
Subclass 556: Edge diffusion by using edge portion of structure other than masking layer to mask
Subclass 563: Glassy source or doped oxide
Subclass 593: Separated by insulator (i.e., floating gate)
Subclass 525: Using oblique beam

Class 257: Active Solid-State Devices (E.G., Transistors, Solid-State Diodes)

This class provides for active solid-state electronic devices, that is, electronic devices or components that are made up primarily of solid materials, usually semiconductors, which operate by the movement of charge carriers - electrons or holes - which undergo energy level changes within the material and can modify an input voltage to achieve rectification, amplification, or switching action, and are not classified elsewhere.

Subclass E21.197: Final conductor layer next to insulator being silicon e.g., polysilicon, with or without impurities (EPO)
Subclass E21.209: Making electrode structure comprising conductor-insulator-conuctor-insulator-semiconductor, e.g., gate stack for non-volatile memory (EPO)
Subclass E21.422: With floating gate (EPO)
Subclass E21.623: Gate conductors with different gate conductor materials or different gate conductor implants, e.g., dual gate structures (EPO)
Subclass E27.103: Electrically programmable ROM (EPO)

Class 711: Electrical Computers And Digital Processing Systems: Memory

This class provides, within an electrical computer or digital data processing system, for the following processes and apparatus 1. for addressing memory wherein the processes and apparatus involve significant address manipulating (e.g., combining, translating, or mapping and other techniques for formatting and modifying address data) and are combined with specific memory configurations or memory systems; 2. for accessing and controlling memory (e.g., transferring and modifying address data, selecting storage devices, scheduling access); and 3. for forming memory addresses (e.g., virtual memory addressing, address translating, translation-lookaside buffers (TLBs), boundary checking, and page mode).

Subclass 106: Refresh scheduling

Class 327: Miscellaneous Active Electrical Nonlinear Devices, Circuits, And Systems

This is the residual class for electrical devices, circuits or systems having an output not directly proportional to its input and comprising at least one component which can provide gain or can route electrical current and which device, circuit or system does not form a complete system such as is classified specifically elsewhere or a subcombination of utility only in such elsewhere classified system.

Subclass 56: With reference signal
Subclass 55: Cross-coupled