Patent for Sale:

Stacked System in Package Integrated Circuit    

3D stacked package active passive integration provides high bandwidth DC-DC voltage conversion and low footprint.

Stacked Active Passive Integration (SAPI) reduces footprint area and saves valuable real-estate, components and cost in portables and small system in package assemblies. Minimizing parasitic elements in integrated assemblies, performance is significantly enhanced, such as in high bandwidth DC-DC point of load (POL) regulators in a microprocessor or portable electronic device assembly. Applications include DC-DC converters and regulators for cell phones and other portable electronics, microprocessor packages and transient noise and high-frequency switching voltage regulators.

Problem Solved by the Technology
Technology scaling for integrated circuits demands higher performance at lower cost and smaller form factors. Footprint and cost reduction simultaneous with higher performance is a key industry requirement. Co-packaged active and passive devices reduce footprint area to an extent, but require footprint that is the sum of footprint areas of the active device and the capacitance passive device typically co-packaged. Planar co-packaging is also associated with parasitic components in circuit pathways that limit performance, such as frequency and bandwidth in point of load switching regulators that may be employed for micro voltage domains in a compact electronic assembly. ComLSI�s Stacked Active Passive Integration provides footprint matching that of the capacitor while providing active circuit integration and functionality unhindered by pathway parasitic elements. Designs such as Transient Regulation and/or Active Noise Regulation are enabled and rendered low cost by this technology.

How the Technology Solves the Problem
The SAPI or Active Packaging architecture stacks an integrated circuit with a passive component such as a high-performance capacitor on a package that conforms to the form factor of the capacitor device. Hence the technology renders a passive capacitor into an �active capacitor� without changing its footprint on a system board or a package substrate while eliminating parasitic elements in circuit pathways between the active device (chip) and the capacitor. This assembly of an active device and a capacitor is then stacked onto another active device that is a load component. This is the closest physical and electrical assembly of a point of load voltage regulator or other electronic circuit assembly with a load component. This packaging architecture utilizes available space in the vertical dimension while enabling symbiotic functionality in, for example, heat conduction.

All POL (point of load) voltage regulator applications in cell phones and other miniature electronic assemblies. Transient Regulators or Active Noise Regulators and Local Voltage Regulators for voltage domains in a microprocessor or other high performance, low energy and power VLSI assemblies.

Low footprint Active Capacitors (Capacitors that respond proactively to reduce noise)
Low footprint Active Filters (combination of active circuits and capacitor(s))

Much lower footprint/cost
Significantly higher performance (bandwidth)
Increased functionality (active capacitors, active filters)

Class 257: Active Solid-State Devices (E.G., Transistors, Solid-State Diodes)

This class provides for active solid-state electronic devices, that is, electronic devices or components that are made up primarily of solid materials, usually semiconductors, which operate by the movement of charge carriers - electrons or holes - which undergo energy level changes within the material and can modify an input voltage to achieve rectification, amplification, or switching action, and are not classified elsewhere.

Subclass E25.029: Devices being of two or more types, e.g., forming hybrid circuits (EPO)
Subclass E25.006: Stacked arrangements of devices (EPO)
Subclass E23.174: Conductive vias through substrate with or without pins, e.g., buried coaxial conductors (EPO)
Subclass E23.079: For integrated circuit devices, e.g., power bus, number of leads (EPO)
Subclass E23.068: Additional leads joined to metallizations on insulating substrate, e.g., pins, bumps, wires, flat leads (EPO)
Subclass 777: Chip mounted on chip
Subclass 690: With contact or lead
Subclass 534: With means to increase surface area (e.g., grooves, ridges, etc.)
Subclass 533: Combined with resistor to form RC filter structure
Subclass 532: Including capacitor component

Class 361: Electricity: Electrical Systems And Devices

Systems or devices which provide safety and protection for other systems and devices; control circuits for electromagnetic devices and non-electromagnetic-type relays. Systems or devices which discharge, or prevent the accumulation of electrical charge on or in an object or material; circuits for charging objects or materials. Systems for generating or conducting an electric charge. Systems which process electrical speed signals. Circuits for reversing the polarity of an electric circuit. Systems which cause the ignition of a fuel or an explosive charge. Systems and processes for demagnetizing a magnetic field. Transformers and inductors with integral switch, capacitor or lock. Electrostatic capacitors, per se. Housings and mounting assemblies with plural diverse electrical components. Electrolytic systems and devices.

Subclass 306.2: For decoupling type capacitor
Subclass 301.4: Stack

View this listing on the Tynax website: www.tynax.com/listing/1569